Driving power supply, display driving circuit and organic light emitting diode display

ABSTRACT

The present invention discloses a driving power supply, a display driving circuit and an organic light emitting diode display. The driving power supply comprises a boost module and a voltage adjusting module connected to the boost module; the boost module is used for boosting an initial voltage input from an initial voltage input terminal of the driving power supply to generate a reference voltage and outputting the reference voltage to the voltage adjusting module; the voltage adjusting module is used for adjusting magnitude of the reference voltage according to colors of pixel units to be driven to generate a plurality of driving voltages, respectively, and the driving voltages corresponding to pixel units of different colors are different.

FIELD OF THE INVENTION

The present invention relates to the field of display technology, andparticularly relates to a driving power supply, a display drivingcircuit and an organic light emitting diode display.

BACKGROUND OF THE INVENTION

Compared to a thin film transistor liquid crystal display (TFT-LCD)which is the mainstream display technique in nowadays, an organic lightemitting diode (OLED) has advantages such as wide viewing angle, highbrightness, high contrast, low power consumption, thinner thickness andlighter weight, and becomes the focus of attention in the field of flatpanel display technology.

Driving methods of the organic light emitting diode displays areclassified into two types: passive matrix type and active matrix type.Compared to a passive matrix type organic light emitting diode display,an active matrix type organic light emitting diode display hasadvantages such as ability to display large amount of information, lowpower consumption, long service life of devices, high contrast ofpicture and the like.

In an organic light emitting diode display, a plurality of pixel unitdriving circuits are provided. Each of the pixel unit driving circuitsis connected with a driving power supply, thus together forming adisplay driving circuit for display.

FIG. 1 is a schematic diagram of a pixel unit driving circuit of anactive matrix type organic light emitting diode display in the priorart, and as shown in FIG. 1, the pixel unit driving circuit includes: aswitching transistor M1, a driving transistor M2, a storage capacitor Cand a light emitting device OLED, wherein, a gate of the drivingtransistor M2 is connected to a drain of the switching transistor M1, asource of the driving transistor M2 is connected to a driving powersupply 1 (sources of driving transistors M2 of a plurality of pixel unitdriving circuits are connected to the same driving power supply 1), adrain of the driving transistor M2 is connected to the light emittingdevice OLED, and when the switching transistor M1 is turned on under thecontrol of a scanning signal Vscan, a data voltage Vdata is transferredto the gate of the driving transistor M2 through the switchingtransistor M1. In the meanwhile, the driving power supply 1 supplies adriving voltage VDD to the source of the driving transistor M2.Gate-source voltage of the driving transistor M2 is Vgs, whichdetermines magnitude of a driving current flowing through the drivingtransistor M2, and the driving current is used for driving the lightemitting device OLED to generate stable light. The function of thestorage capacitor C is to maintain the stability of gate voltage of thedriving transistor M2 during one frame time.

When the light emitting device OLED emits light, a voltage drop VD1generated by the light emitting device OLED, a voltage drop VDS on aload current path (drain-source path) of the driving transistor M2 andthe driving voltage VDD generated by the driving power supply 1 satisfythe following relationship: VDD=VDS+VD1.

FIG. 2 is a schematic circuit diagram of the driving power supply inFIG. 1, and as shown in FIG. 2, the driving power supply includes: aboost module, one terminal of which is connected to an initial voltageinput terminal and the other terminal of which is connected to thedriving transistor M2 in the pixel unit driving circuit. The boostmodule is used for boosting an initial voltage VCC input from theinitial voltage input terminal to obtain the driving voltage VDD, andoutputting the driving voltage VDD to the driving transistor M2. Theboost module includes: a boost chip 2, an energy-storage inductor L, afirst switching tube T1, a Schottky diode D, a first resistor RA, asecond resistor RB and a first filter capacitor C1, wherein, oneterminal of the energy-storage inductor L is connected to the initialvoltage input terminal, the other terminal of the energy-storageinductor L is connected to a first terminal of the Schottky diode D anda second electrode of the first switching tube T1, an input terminal ofthe boost chip 2 is connected to the initial voltage input terminal, afeedback terminal of the boost chip 2 is connected to the first resistorRA and the second resistor RB, a control terminal of the boost chip 2 isconnected to a gate of the first switching tube T1, the first terminalof the Schottky diode D is connected to the second electrode of thefirst switching tube T1, and a second terminal of the Schottky diode Dis connected to the first filter capacitor C1.

Boosting voltage can be achieved by controlling a field effecttransistor (not shown) integrated inside the boost chip 2 to be turnedon or off. Specifically, when the field effect transistor integratedinside the boost chip 2 is turned on, the Schottky diode D is turned offreversely, current in the energy-storage inductor L increasesconstantly, and the energy-storage inductor L stores energy; when thefield effect transistor integrated inside the boost chip 2 is turnedoff, the energy-storage inductor L outputs through the Schottky diode D,thus accomplishing energy transfer. The feedback terminal of the boostchip 2 controls turn-on time and turn-off time of the integrated fieldeffect transistor according to voltage across the second resistor RB,thereby controlling magnitude of the driving voltage VDD output from theboost module.

FIG. 3 is a diagram illustrating the driving principle of an activematrix type organic light emitting diode display in the prior art, andFIG. 4 is graph illustrating relationship between brightnesses of red,green and blue organic electroluminescent devices and voltage dropsthereof As shown in FIGS. 3 and 4, the organic light emitting diodedisplay includes pixel units of three different colors: red (R), green(G) and blue (B), wherein, a red organic electroluminescent device OLEDRis provided inside a red pixel unit, a green organic electroluminescentdevice OLEDG is provided inside a green pixel unit, a blue organicelectroluminescent device OLEDB is provided inside a blue pixel unit,and all of the pixel units are driven by the same driving voltage VDD(magnitude of the driving voltage VDD satisfy the condition that theblue organic electroluminescent device OLEDB can be driven when reachingits maximum brightness).

Referring to FIG. 4, since light emitting layers of the organicelectroluminescent devices of three different colors are made ofdifferent semiconductor materials, the organic electroluminescentdevices of three different colors generate different voltage drops whenthey have the same brightness. The voltage drop generated by the blueorganic electroluminescent device OLEDB is the largest, the voltage dropgenerated by the red organic electroluminescent device OLEDR follows,and the voltage drop generated by the green organic electroluminescentdevice OLEDG is the smallest. Here, since all of the pixel units aredriven by the same driving voltage VDD, gate-source voltages of thedriving transistors inside the red and green pixel units will be large.However, loading large voltage on the driving transistor will not onlyheat the driving transistor and further impact service life of thedriving transistor, but also result in large power consumption of thedisplay driving circuit.

SUMMARY OF THE INVENTION

The present invention provides a driving power supply, a display drivingcircuit and an organic light emitting diode display, which are used forsolving the technical problem that heating in the driving transistor isserious and power consumption of the display driving circuit is large,due to large voltage loaded across the driving transistor in the priorart.

In order to achieve the above object, the present invention provides adriving power supply, comprising a boost module and a voltage adjustingmodule connected to the boost module,

wherein, the boost module is used for boosting an initial voltage inputfrom an initial voltage input terminal of the driving power supply togenerate a reference voltage and for outputting the reference voltage tothe voltage adjusting module; and

the voltage adjusting module is used for adjusting magnitude of thereference voltage according to colors of pixel units to be driven togenerate a plurality of driving voltages, respectively, wherein, thedriving voltages corresponding to pixel units of different colors aredifferent.

Optionally, the driving power supply further comprises: a plurality ofdriving voltage output terminals for outputting the plurality of drivingvoltages, the driving voltage output terminals are connected to thevoltage adjusting module, each driving voltage output terminal is usedfor driving the pixel units of one color, and different driving voltageoutput terminals output different driving voltages.

Optionally, the voltage adjusting module comprises: a pulse controlmodule, second switching tubes and second filter capacitors, the numberof the second switching tubes and the number of the second filtercapacitors are equal to that of the driving voltage output terminals,the second switching tubes are in one-to-one correspondence with thedriving voltage output terminals, and the second filter capacitors arein one-to-one correspondence with the driving voltage output terminals;

gates of the second switching tubes are connected to the pulse controlmodule, first electrodes of the second switching tubes are connected tothe boost module, second electrodes of the second switching tubes areconnected to the corresponding driving voltage output terminals andfirst terminals of the second filter capacitors;

second terminals of the second filter capacitors are grounded; and

the pulse control module is used for generating pulse control signalsand sending them to the second switching tubes, respectively, and dutyratio of each pulse control signal equals to a ratio between the drivingvoltage output from the driving voltage output terminal connected to thesecond switching tube which receives said pulse control signal and thereference voltage.

Optionally, the pulse control module comprises: a pulse-adjustingcontrol sub-module, a pulse generator, a pulse width modulation circuitand a level conversion circuit, and the pulse width modulation circuitis connected to all of the pulse-adjusting control sub-module, the pulsegenerator and the level conversion circuit;

the pulse-adjusting control sub-module is used for generating aplurality of pulse-adjusting control signals according to the referencevoltage and the driving voltages to be generated by the voltageadjusting module;

the pulse generator is used for generating an initial pulse signal witha preset frequency;

the pulse width modulation circuit is used for performing pulse widthmodulation on the initial pulse signal according to the respectivepulse-adjusting control signals, so as to generate a plurality ofinitial pulse control signals; and

the level conversion circuit is used for performing level conversion onthe initial pulse control signals so as to generate a plurality of pulsecontrol signals, which are used for controlling on/off states of thesecond switching tubes, respectively.

Optionally, the pulse-adjusting control sub-module comprises: a storagedevice and a decoding circuit connected to both the storage device andthe pulse width modulation circuit;

the storage device stores data information of the reference voltage anddata information of the driving voltages to be generated by the voltageadjusting module; and

the decoding circuit is used for performing a decoding process on thedata information of the reference voltage and the data information ofthe driving voltages to be generated by the voltage adjusting module, soas to obtain voltage values of the reference voltage and the drivingvoltages to be generated by the voltage adjusting module, and thedecoding circuit is further used for generating pulse-adjusting controlsignals according to ratios between the voltage values of the drivingvoltages to be generated by the voltage adjusting module and the voltagevalue of the reference voltage.

Optionally, the storage device is a read-only memory, which pre-storesdata information of the driving voltages corresponding to the pixelunits of different colors and the data information of the referencevoltage.

Optionally, the storage device is a register, and the pulse-adjustingcontrol sub-module further comprises: a signal receiver which isconnected to the decoding circuit;

the signal receiver is used for receiving a timing control signal sentby a timing controller outside the driving power supply, and the timingcontrol signal includes the data information of the reference voltageand the data information of the driving voltages to be generated by thevoltage adjusting module; and

the decoding circuit is further used for decoding the timing controlsignal to obtain the data information of the reference voltage and thedata information of the driving voltages to be generated by the voltageadjusting module therein, and storing the decoded data information ofthe reference voltage and the decoded data information of the drivingvoltages to be generated by the voltage adjusting module into theregister.

Optionally, the pulse-adjusting control sub-module comprises: a firstlevel signal input terminal and groups of divider resistors whose numberis the same as that of the driving voltage output terminals, each groupof divider resistors comprises: a third resistor and a fourth resistorconnected in series;

the first level signal input terminal is connected to first terminals ofthe third resistors, second terminals of the fourth resistors aregrounded, second terminals of the third resistors and first terminals ofthe fourth resistors are connected to the pulse width modulationcircuit;

the first level signal input terminal is used for generating a firstinitial level signal and outputting the first initial level signal tothe groups of divider resistors;

the groups of divider resistors each are used for performing voltagedividing process on the first initial level signal to generate thepulse-adjusting control signals; and

ratios between resistance values of the third resistors and resistancevalues of the fourth resistors in different groups of divider resistorsare different.

Optionally, the pulse-adjusting control sub-module comprises: a secondlevel signal input terminal and fifth resistors whose number is the sameas that of the driving voltage output terminals, the second level signalinput terminal is connected to first terminals of the fifth resistors,and second terminals of the fifth resistors are connected to the pulsewidth modulation circuit;

the second level signal input terminal is used for generating a secondinitial level signal and outputting the second initial level signal tothe fifth resistors;

the fifth resistors each are used for performing voltage reduction onthe second initial level signal to generate the pulse-adjusting controlsignals; and

resistance values of the fifth resistors are different from each other.

Optionally, the pixel units include: red pixel units, green pixel unitsand blue pixel units, and the number of the driving voltage outputterminals is three.

Optionally, the pulse control signals include: red pulse control signal,green pulse control signal and blue pulse control signal;

phase differences between a rising edge of any one of the red pulsecontrol signal, the green pulse control signal and the blue pulsecontrol signal and rising edges of the other two pulse control signalsare both 120 degrees; or,

phase differences between a falling edge of any one of the red pulsecontrol signal, the green pulse control signal and the blue pulsecontrol signal and falling edges of the other two pulse control signalsare both 120 degrees.

Optionally, the pulse control module is a single chip microcomputer.

Optionally, the voltage adjusting module comprises: linear voltageregulators and third filter capacitors, the number of the linear voltageregulators and the number of the third filter capacitors are the same asthat of the driving voltage output terminals, the linear voltageregulators are in one-to-one correspondence with the driving voltageoutput terminals, and the third filter capacitors are in one-to-onecorrespondence with the driving voltage output terminals;

input terminals of the linear voltage regulators are connected to theboost module, and output terminals of the linear voltage regulators areconnected to the driving voltage output terminals and first terminals ofthe third filter capacitors;

second terminals of the third filter capacitors are grounded;

the linear regulators each are used for performing voltage reduction onthe reference voltage to generate the driving voltages; and

different linear voltage regulators have different voltage reductionextents.

In order to achieve the above object, the present invention furtherprovides a display driving circuit, comprising a driving power supplywhich is the above-described power supply.

In order to achieve the above object, the present invention furtherprovides an organic light emitting diode display, comprising a displaydriving circuit which is the above-described display driving circuit.

The present invention has the following beneficial effects:

the present invention provides a driving power supply, a display drivingcircuit and an organic light emitting diode display, wherein, thedriving power supply can provide corresponding driving voltage accordingto colors of the pixel units to be driven, so that the voltage acrossthe driving transistor in the driving circuit of the pixel unit isreduced as compared to the voltage across the driving transistor in theprior art, thereby reducing power consumption of the driving transistorand further reducing power consumption of the display driving circuit asa whole. Besides, heat generated by the driving transistor is reduced,and reliability of the transistor is improved.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic diagram of a pixel unit driving circuit of anactive matrix type organic light emitting diode display in the priorart;

FIG. 2 is a schematic circuit diagram of the driving power supply inFIG. 1;

FIG. 3 is a diagram illustrating the driving principle of an activematrix type organic light emitting diode display in the prior art;

FIG. 4 is graph illustrating relationship between brightnesses of red,green and blue organic electroluminescent devices and voltage dropsthereof;

FIG. 5 is a schematic circuit diagram of a driving power supply providedby Embodiment 1 of the present invention;

FIG. 6 is a schematic circuit diagram of a driving power supply providedby Embodiment 2 of the present invention;

FIG. 7 is a timing diagram of red pulse control signal, green pulsecontrol signal and blue pulse control signal in an embodiment of thepresent invention;

FIG. 8 is a schematic diagram of structure, as one optionalimplementation, of the pulse control module in FIG. 6;

FIG. 9 is a schematic diagram of structure, as another optionalimplementation, of the pulse control module in FIG. 6;

FIG. 10 is a schematic diagram of structure, as still another optionalimplementation, of the pulse control module in FIG. 6;

FIG. 11 is a schematic circuit diagram of a driving power supplyprovided by Embodiment 3 of the present invention;

FIG. 12 is a schematic circuit diagram of an organic light emittingdiode display provided by Embodiment 5 of the present invention; and

FIG. 13 is a diagram illustrating the driving principle of the organiclight emitting diode display shown in FIG. 12.

DETAILED DESCRIPTION OF THE EMBODIMENTS

To enable those skilled in the art to better understand the technicalsolutions of the present invention, a driving power supply, a displaydriving circuit and an organic light emitting diode display provided bythe present invention will be described in detail below in conjunctionwith the accompanying drawings.

Embodiment 1

FIG. 5 is a schematic circuit diagram of a driving power supply providedby Embodiment 1 of the present invention, and as shown in FIG. 5, thedriving power supply includes: a boost module 3 and a voltage adjustingmodule 4, wherein, the voltage adjusting module 4 is connected to theboost module 3, the boost module 3 is used for boosting an initialvoltage VCC input from an initial voltage input terminal of the drivingpower supply to generate a reference voltage VDD1 and for outputting thereference voltage VDD1 to the voltage adjusting module 4, and thevoltage adjusting module 4 is used for adjusting magnitude of thereference voltage VDD1 according to colors of pixel units to be driven,so as to generate a plurality of driving voltages respectively. Here,driving voltages corresponding to pixel units of different colors aredifferent.

It should be noted that, specific structure and boosting principle ofthe boost module 3 belong to the prior art, and are not describedrepeatedly herein. The reference voltage VDD1 in the present embodimentis equal in magnitude to the driving voltage VDD in the prior art.

The driving power supply provided by the present embodiment can generatecorresponding driving voltage according to colors of the pixel units tobe driven, and thus pixel units of different colors are driven bydifferent driving voltages.

Optionally, the driving power supply further includes: a plurality ofdriving voltage output terminals for outputting the driving voltages.Each of the driving voltage output terminals is connected to the voltageadjusting module 4 and is used for driving pixel units of one color, anddifferent driving voltage output terminals output different drivingvoltages.

The present embodiment is described by taking the case that the pixelunits include red, green and blue pixel units as an example.Accordingly, there are three driving voltage output terminals in thedriving power supply, and it is assumed that the three driving voltageoutput terminals are red driving voltage output terminal, green drivingvoltage output terminal and blue driving voltage output terminal,respectively. The red driving voltage output terminal is connected todriving transistors in the driving circuits of a plurality of red pixelunits, the green driving voltage output terminal is connected to drivingtransistors in the driving circuits of a plurality of green pixel units,and the blue driving voltage output terminal is connected to drivingtransistors in the driving circuits of a plurality of blue pixel units.Here, the driving voltage output from the red driving voltage outputterminal is red driving voltage VDDR, the driving voltage output fromthe green driving voltage output terminal is green driving voltage VDDG,and the driving voltage output from the blue driving voltage outputterminal is blue driving voltage VDDB. The red driving voltage VDDR, thegreen driving voltage VDDG and the blue driving voltage VDDB are allsmaller than or equal to the reference voltage VDD1, and the red drivingvoltage VDDR, the green driving voltage VDDG and the blue drivingvoltage VDDB are different in magnitude. In the present embodiment, thered driving voltage VDDR may be used for driving in the driving circuitof the red pixel unit, the green driving voltage VDDG may be used fordriving in the driving circuit of the green pixel unit, and the bluedriving voltage VDDB may be used for driving in the driving circuit ofthe blue pixel unit. In this way, compared to the prior art, the drivingpower supply provided by the present embodiment can effectively lowerthe gate-source voltages of driving transistors in the driving circuitsof the red pixel unit and the green pixel unit, thereby avoiding heatingin the driving transistors and reducing power consumption of the drivingtransistors as well. As for the whole display driving circuit, sincepower consumption of a part of the driving transistors is reduced, powerconsumption of the display driving circuit as a whole can be reduced.

Embodiment 1 of the present invention provides a driving power source,which can provide corresponding driving voltage according to colors ofthe pixel units to be driven, and further reduce the voltage across thedriving transistor in the driving circuit of the pixel unit as comparedto the voltage across the driving transistor in the prior art, therebyreducing power consumption of the driving transistor and furtherreducing power consumption of the display driving circuit as a whole.

Embodiment 2

FIG. 6 is a schematic circuit diagram of a driving power supply providedby Embodiment 2 of the present invention, as shown in FIG. 6, thedriving power supply includes: a boost module 3 and a voltage adjustingmodule 4, and connection and functions of the boost module 3 and thevoltage adjusting module 4 may refer to Embodiment 1. The presentembodiment provide one specific structure of the driving power supply inthe above Embodiment 1, and will be described by taking the case thatthere are three driving voltage output terminals in the driving powersupply as an example as well. In the present embodiment, the voltageadjusting module 4 includes: a pulse control module 5, second switchingtubes T2 and second filter capacitors C2, and the number of secondswitching tubes T2 and the number of second filter capacitors C2 areequal to that of the driving voltage output terminals. The secondswitching tubes T2 are in one-to-one correspondence with the drivingvoltage output terminals, and the second filter capacitors C2 are inone-to-one correspondence with the driving voltage output terminals,that is, each driving voltage output terminal is connected to one pairof second switching tube T2 and second filter capacitor C2. Gates of thesecond switching tubes T2 are connected to the pulse control module 5,first electrodes of the second switching tubes T2 are connected to theboost module 3, second electrodes of the second switching tubes T2 areconnected to the corresponding driving voltage output terminals andfirst terminals of the second filter capacitors C2, and second terminalsof the second filter capacitors C2 are grounded. The pulse controlmodule 5 is used for generating pulse control signals and sending thepulse control signals to the second switching tubes T2, respectively.Duty ratio of each pulse control signal equals to a ratio between thedriving voltage output from the driving voltage output terminalconnected to the second switching tube T2 which receives the pulsecontrol signal and the reference voltage VDD1.

Here, the first electrode of the second switching tube T2 refers to thesource of the second switching tube T2, and the second electrode of thesecond switching tube T2 refers to the drain of the second switchingtube T2.

Specifically, the pulse control module 5 may include: a pulse-adjustingcontrol sub-module 9, a pulse generator 6, a pulse width modulationcircuit 7 and a level conversion circuit 8. The pulse width modulationcircuit 7 is connected to the pulse-adjusting control sub-module 9, thepulse generator 6 and the level conversion circuit 8, and thepulse-adjusting control sub-module 9 is used for generating a pluralityof pulse-adjusting control signals according to the reference voltageand the driving voltages to be generated by the voltage adjusting module4. The pulse generator 6 is used for generating an initial pulse signal;the pulse width modulation circuit 7 is used for performing pulse widthmodulation on the initial pulse signal according to the respectivepulse-adjusting control signals, so as to generate a plurality ofinitial pulse control signals DR, DG, and DB; and the level conversioncircuit 8 is used for performing level conversion on the initial pulsecontrol signals so as to generate a plurality of pulse control signalsPR, PG, and PB, which are used for controlling on/off states of thesecond switching tubes T2, respectively.

Further, the pulse-adjusting control sub-module 9 may include: a storagedevice and a decoding circuit 10, and the decoding circuit 10 isconnected to the storage device and the pulse width modulation circuit7. The storage device stores data information of the reference voltageand data information of the driving voltages to be generated by thevoltage adjusting module 4; the decoding circuit 10 is used forperforming a decoding process on the data information of the referencevoltage and the data information of the driving voltages to begenerated, so as to obtain voltage values of the reference voltage andthe driving voltages to be generated, and the decoding circuit 10 isfurther used for generating pulse-adjusting control signals according toratios between the voltage values of the driving voltages to begenerated and the voltage value of the reference voltage.

Further, the storage device may be a register 11, and thepulse-adjusting control sub-module 9 may further include: a signalreceiver 12 which is connected to the decoding circuit 10 and is usedfor receiving a timing control signal sent by a timing controlleroutside the driving power supply. The timing controller sends the timingcontrol signal to the signal receiver 12 through SPI interface or I2Cbus or S-wire bus, and the timing control signal includes datainformation of the reference voltage and data information of the drivingvoltages to be generated by the voltage adjusting module 4. The decodingcircuit 10 is further used for decoding the timing control signal toobtain the data information of the reference voltage and the datainformation of the driving voltages to be generated therein, and storingthe decoded data information of the reference voltage and the decodeddata information of the driving voltages to be generated into theregister 11.

Working principle of the driving power supply provided by the presentembodiment will be described in detail below in conjunction with theaccompanying drawings.

Referring to FIG. 6, firstly, the signal receiver 12 receives the timingcontrol signal sent by the timing controller and transmits the receivedtiming control signal to the decoding circuit 10, and the decodingcircuit 10 decodes the timing control signal to obtain the datainformation of the reference voltage and the data information of thedriving voltages corresponding to the pixel units to be driven (i.e.,data information of the driving voltages to be generated by the voltageadjusting module 4) therein, and stores them in the register 11.Subsequently, the decoding circuit 10 decodes the data information ofthe reference voltage and the data information of the driving voltagesto be generated, which are stored in the register 11, so as to obtainvoltage values of the reference voltage and the driving voltages to begenerated, and then generates a plurality of pulse-adjusting controlsignals according to ratios between the respective decoded voltagevalues of the driving voltages to be generated and the referencevoltage, and transmits the pulse-adjusting control signals to the pulsewidth modulation circuit 7; in the meanwhile, the pulse generator 6generates an initial pulse signal with a preset frequency and transmitsthe initial pulse signal to the pulse width modulation circuit 7.Afterwards, the pulse width modulation circuit 7 perform pulse widthmodulation on the initial pulse signal according to the respectivepulse-adjusting control signals generated by the decoding circuit 10,respectively, so as to generate a plurality of initial pulse controlsignals (voltages thereof are far less than the reference voltage VDD1),and each initial pulse control signal has a duty ratio equal to theratio between the voltage value of the driving voltage correspondingthereto and the voltage value of the reference voltage. It should benoted that voltages of the initial pulse control signals are not strongenough to control on/off states of the second switching tubes T2 at thispoint. After that, the level conversion circuit 8 performs levelconversion on the initial pulse control signals generated by the pulsewidth modulation circuit 7, respectively, so as to generate a pluralityof pulse control signals (voltages thereof are generally close to thereference voltage VDD1), and the plurality of pulse control signals arerespectively used for controlling on/off states of the second switchingtubes T2. It should be noted that, level conversion raises voltages ofthe initial pulse control signals so that the obtained pulse controlsignals are strong enough to control on/off states of the secondswitching tubes T2, and duty ratios of the pulse control signals are thesame as those of the initial pulse control signals. Finally, on/offstates (specifically, ratios between on time and off time) of the secondswitching tubes T2 are controlled by the respective pulse controlsignals. Since on/off states of the second switching tubes T2 controlledby different pulse control signals are different, different voltages canbe generated at the second electrodes of the second switching tubes T2,these voltages are then subjected to filtering process performed by thesecond filter capacitors C2, and stable driving voltages havingdifferent magnitudes are output at corresponding driving voltage outputterminals. Here, the magnitude of the driving voltage is equal to aproduct of the reference voltage and the duty ratio of the pulse controlsignal.

It should be noted that, in the present embodiment, in the case that thesecond switching tube T2 is a N-type transistor, if the pulse controlsignal is at high level, the second switching tube T2 is turned on; ifthe pulse control signal is at low level, the second switching tube T2is turned off In this case, the above-mentioned duty ratio of the pulsecontrol signal specifically refers to a percentage, in one pulse period,of the time when the pulse control signal is at high level in the wholepulse period. In the case that the second switching tube T2 is a P-typetransistor, if the pulse control signal is at high level, the secondswitching tube T2 is turned off; if the pulse control signal is at lowlevel, the second switching tube T2 is turned on. In this case, theabove-mentioned duty ratio of the pulse control signal specificallyrefers to a percentage, in one pulse period, of the time when the pulsecontrol signal is at low level in the whole pulse period.

In the present embodiment, corresponding to red pixel units, green pixelunits and blue pixel units, the signal receiver 12 receives three typesof timing control signals, each of which corresponds to pixel units ofone color. Three types of initial pulse control signals with differentduty ratios can be output at the output terminal of the pulse widthmodulation circuit 7, and specifically are: red initial pulse controlsignal DR, green initial pulse control signal DG and blue initial pulsecontrol signal DB. Here, duty ratio of the green initial pulse controlsignal DG is smaller than that of the red initial pulse control signalDR, and the duty ratio of the red initial pulse control signal DR issmaller than that of the blue initial pulse control signal DB. Thesethree types of initial pulse control signals are converted into redpulse control signal PR, green pulse control signal PG and blue pulsecontrol signal PB after being subjected to level conversion performed bythe level conversion circuit 8, respectively.

FIG. 7 is a timing diagram of red pulse control signal, green pulsecontrol signal and blue pulse control signal in the embodiment of thepresent invention, as shown in FIG. 7, in the present embodiment, it isassumed that duty ratio of the red pulse control signal PR is 65%, dutyratio of the green pulse control signal PG is 50%, and duty ratio of theblue pulse control signal PB is 80%, and periods of the three pulsecontrol signals are all T. When the second switching tube T2 is a N-typetransistor (corresponding to the case as shown in FIG. 7), the time whenthe red pulse control signal PR is at high level in one period is 0.65T,the time when the green pulse control signal PG is at high level in oneperiod is 0.50T, and the time when the blue pulse control signal PB isat high level in one period is 0.80T. Preferably, phase differencesbetween a rising edge of any one of the red pulse control signal PR, thegreen pulse control signal PG and the blue pulse control signal PB andrising edges of the other two pulse control signals are both 120 degrees(one third of one pulse period, i.e., T/3). For example, as shown inFIG. 7, the rising edge of the green pulse control signal PG lags behindthat of the red pulse control signal PR by 120 degrees, and the risingedge of the blue pulse control signal PB lags behind that of the greenpulse control signal PG by 120 degrees (i.e., 120 degrees ahead of therising edge of the red pulse control signal PR). It should be notedthat, the case shown in FIG. 7 is just exemplary, instead of limitingthe technical solutions of the present application. By configuring phasedifferences between the rising edge of any one of the red pulse controlsignal PR, the green pulse control signal PG and the blue pulse controlsignal PB and the rising edges of the other two pulse control signals tobe 120 degrees, work efficiency of the whole power supply system can beeffectively promoted.

Accordingly, when the second switching tube T2 is a P-type transistor,the time when the red pulse control signal PR is at low level in oneperiod is 0.65T, the time when the green pulse control signal PG is atlow level in one period is 0.50T, and the time when the blue pulsecontrol signal PB is at low level in one period is 0.80T, phasedifferences between a falling edge of any one of the red pulse controlsignal PR, the green pulse control signal PG and the blue pulse controlsignal PB and falling edges of the other two pulse control signals areboth 120 degrees (one third of one pulse period, i.e., T/3), andschematic drawings corresponding to this case are not given.

It should be noted that, structure of the pulse control module 5 in thepresent embodiment is not limited to that shown in FIG. 6.

FIG. 8 is a schematic diagram of structure, as another optionalimplementation, of the pulse control module 5, and as shown in FIG. 5,the pulse control module 5 includes: a pulse-adjusting controlsub-module 9, a pulse generator 6, a pulse width modulation circuit 7and a level conversion circuit 8. The pulse-adjusting control sub-module9 includes: a read-only memory 13, in which data information of thedriving voltages VDDR, VDDG and VDDB respectively corresponding to thered pixel units, green pixel units and blue pixel units and datainformation of the reference voltage VDD1 are pre-stored; and a decodingcircuit 10, which can directly obtain corresponding data information andperform decoding process to generate corresponding pulse-adjustingcontrol signals. The pulse width modulation circuit 7 generates redinitial pulse control signal DR, green initial pulse control signal DGor blue initial pulse control signal DB based on the respectivepulse-adjusting control signals.

FIG. 9 is a schematic diagram of structure, as another optionalimplementation, of the pulse control module 5, and as shown in FIG. 9,the pulse control module 5 includes: a pulse-adjusting controlsub-module 9, a pulse generator 6, a pulse width modulation circuit 7and a level conversion circuit 8. The pulse-adjusting control sub-module9 includes: a first level signal input terminal 14 and groups of dividerresistors, and the number of the groups is the same as that of thedriving voltage output terminals. Each group of divider resistorsincludes one third resistor R3, R3′ or R3″ and one fourth resistor R4,R4′ or R4″ connected in series, the first level signal input terminal 14is connected to first terminals of the third resistors R3, R3′ and R3″,second terminals of the fourth resistors R4, R4′ and R4″ are grounded,and second terminals of the third resistors R3, R3′ and R3″ and firstterminals of the fourth resistors R4, R4′ and R4″ are connected to thepulse width modulation circuit 7; the first level signal input terminal14 is used for generating a first initial level signal and outputtingthe first initial level signal to the groups of divider resistors at thesame time, the groups of divider resistors each are used for performingvoltage dividing process on the first initial level signal to generate aplurality of pulse-adjusting control signals. Ratios between resistancevalues of the third resistors and resistance values of the fourthresistors in different groups of divider resistors are different, and inthis way, the generated pulse-adjusting control signals have differentvoltage values.

Corresponding to the pixel units of three different colors, the numberof groups of divider resistors in FIG. 9 is three. Ratios betweenresistance values of the third resistors and resistance values of thefourth resistors in the respective groups of divider resistors aredifferent from each other, that is, the ratio between R3 and R4, theratio between R3′ and R4′, and the ratio between R3″ and R4″ aredifferent from each other. Therefore, the three groups of dividerresistors can output three pulse-adjusting control signals withdifferent voltage values to the pulse width modulation circuit 7 intotal, and based on the received pulse-adjusting control signals withdifferent voltage values, the pulse width modulation circuit 7 canoutput three initial pulse control signals with different duty ratios intotal, i.e., red initial pulse control signal DR, green initial pulsecontrol signal DG and blue initial pulse control signal DB.

FIG. 10 is a schematic diagram of structure, as still another optionalimplementation, of the pulse control module 5, and as shown in FIG. 10,the pulse control module 5 includes a pulse-adjusting control sub-module9, a pulse generator 6, a pulse width modulation circuit 7 and a levelconversion circuit 8. The pulse-adjusting control sub-module 9 includes:a second level signal input terminal 16 and fifth resistors R5, R5′ andR5″ whose number is the same as that of the driving voltage outputterminals. The second level signal input terminal 16 is connected tofirst terminals of the fifth resistors R5, R5′ and R5″, and secondterminals of the fifth resistors R5, R5′ and R5″ are connected to thepulse width modulation circuit 7. The second level signal input terminal16 is used for generating a second initial level signal and outputtingthe second initial level signal to the fifth resistors R5, R5′ and R5″at the same time, and the fifth resistors R5, R5′ and R5″ each are usedfor performing voltage reduction on the second initial level signal togenerate a plurality of pulse-adjusting control signals. Here,resistance values of the fifth resistors R5, R5′ and R5″ are differentfrom each other, and thus voltage values of the generatedpulse-adjusting control signals are different.

Corresponding to the pixel units of three different colors, the numberof the fifth resistors in FIG. 10 is three. Resistance values of therespective fifth resistors are different, that is, values of R5, R5′ andR5″ are different from each other, and therefore, the second terminalsof the three fifth resistors can output three pulse-adjusting controlsignals with different voltage values to the pulse width modulationcircuit 7 in total. Based on the received pulse-adjusting controlsignals with different voltage values, the pulse width modulationcircuit 7 can output three initial pulse control signals with differentduty ratios in total, i.e., red initial pulse control signal DR, greeninitial pulse control signal DG and blue initial pulse control signalDB.

In addition, the pulse control module 5 in the present embodiment mayfurther be a single chip microcomputer, through which pulse controlsignals with different duty ratios can be outputted to the secondswitching tubes. This process is the prior art in the field, and is notdescribed in detail herein.

Embodiment 2 of the present invention provides a driving power source,which can provide corresponding driving voltage according to colors ofthe pixel units to be driven, and further reduce the voltage across thedriving transistor in the driving circuit of the pixel unit as comparedto the voltage across the driving transistor in the prior art, therebyreducing power consumption of the driving transistor and furtherreducing power consumption of the display driving circuit as a whole.

Embodiment 3

FIG. 11 is a schematic circuit diagram of a driving power supplyprovided by Embodiment 3 of the present invention, as shown in FIG. 11,the driving power supply includes: a boost module 3 and a voltageadjusting module 4, and connection and functions of the boost module 3and the voltage adjusting module 4 may refer to the above-describedEmbodiment 1. The present embodiment provide another specific structureof the driving power supply in the above-described Embodiment 1, andwill be described by taking the case that there are three drivingvoltage output terminals in the driving power supply as an example aswell. Here, the voltage adjusting module 4 includes: linear voltageregulators 17, 18 and 19 and third filter capacitors C3, the number ofthe linear voltage regulators 17, 18 and 19 and the number of the thirdfilter capacitors C3 are the same as that of the driving voltage outputterminals. The linear voltage regulators 17, 18 and 19 are in one-to-onecorrespondence with the driving voltage output terminals, the thirdfilter capacitors C3 are in one-to-one correspondence with the drivingvoltage output terminals, input terminals of the linear voltageregulators are connected to the boost module 3, output terminals of thelinear voltage regulators 17, 18 and 19 are connected to the drivingvoltage output terminals and first terminals of the third filtercapacitors C3, second terminals of the third filter capacitors C3 aregrounded, the linear regulators each are used for performing voltagereduction on the reference voltage VDD1 to generate the driving voltagesVDDR, VDDG and VDDB, and different linear voltage regulators havedifferent voltage reduction extents.

Since the same voltage (the reference voltage VDD1) is input to theinput terminal of each of the linear voltage regulators 17, 18 and 19,and in the meanwhile, different linear voltage regulators 17, 18 and 19have different voltage reduction extents, the three linear voltageregulators 17, 18 and 19 can output three different driving voltages,which are used for driving the pixel units of different colors,respectively.

It should be noted that, structure and working principle of the linearvoltage regulator belong to the prior art in the field, and are notdescribed in detail herein.

Embodiment 3 of the present invention provides a driving power source,which can provide corresponding driving voltage according to colors ofthe pixel units to be driven, and further reduce the voltage across thedriving transistor in the driving circuit of the pixel unit as comparedto the voltage across the driving transistor in the prior art, therebyreducing power consumption of the driving transistor and furtherreducing power consumption of the display driving circuit as a whole.

Embodiment 4

Embodiment 4 of the present invention provides a display driving circuitincluding a driving power supply, which is the driving power supplydescribed in any one of the above Embodiments 1 to 3. Specific structureof the driving power supply may refer to the descriptions in the aboveEmbodiments 1 to 3.

Embodiment 4 of the present invention provides a display driving circuitincluding the above-described driving power supply, which can providecorresponding driving voltage according to colors of the pixel units tobe driven, and further reduce the voltage across the driving transistorin the driving circuit of the pixel unit as compared to the voltageacross the driving transistor in the prior art, thereby reducing powerconsumption of the driving transistor and further reducing powerconsumption of the display driving circuit as a whole.

Embodiment 5

Embodiment 5 of the present invention provides an organic light-emittingdiode display including a display driving circuit, which is the displaydriving circuit described in the above Embodiment 4.

FIG. 12 is a schematic circuit diagram of the organic light emittingdiode display provided by Embodiment 5 of the present invention, FIG. 13is a diagram illustrating the driving principle of the organic lightemitting diode display shown in FIG. 12, and as shown in FIGS. 12 and13, the organic light emitting diode display includes: a display panel25, a power supply module 20, a timing controller 22, a display drivingcircuit, a scanning circuit 23 and a data driving circuit 24. Thedisplay panel 25 includes a plurality of pixel units, and the displaydriving circuit at least includes: a driving power supply 21 and aplurality of pixel unit driving circuits driven by the driving powersupply 21. Each pixel unit driving circuit includes: a switchingtransistor M1, a driving transistor M2, a storage capacitor and lightemitting devices OLEDR, OLEDG and OLEDB. The switching transistor M1,the driving transistor M2, the storage capacitor and the light emittingdevices are all formed above the substrate in the display panel 25,which is not shown in FIG. 12. The power supply module 20 is connectedto all of the timing controller 22, the data driving circuit 24 and thedriving power supply 21, the timing controller 22 is connected to all ofthe driving power supply 21, the scanning circuit 23 and the datadriving circuit 24, the scanning circuit 23 is connected to the gate ofthe switching transistor M1, and the data driving circuit 24 isconnected to the source of the switching transistor M1. The drivingpower supply 21 can output different driving voltages to the pixel unitsof different colors (or, a plurality of pixel unit driving circuits) inthe display panel 25. Here, the pixel units of the same color correspondto driving voltages of the same magnitude, and the pixel units ofdifferent colors correspond to driving voltages of different magnitudes.

It is assumed that the pixel units in the present embodiment include:red pixel units (each including red organic electroluminescent deviceOLEDR), green pixel units (each including green organicelectroluminescent device OLEDG) and blue pixel units (each includingblue organic electroluminescent device OLEDB). Corresponding to thepixel units of three different colors, the driving power supply 21 canprovide three different driving voltages, which are respectively: reddriving voltage VDDR, green driving voltage VDDG and blue drivingvoltage VDDB, and magnitudes of VDDR, VDDG and VDDB satisfy relationshipof VDDG<VDDR<VDDB. The red driving voltage VDDR is used for driving thered pixel units, the green driving voltage VDDG is used for driving thegreen pixel units, and the blue driving voltage VDDB is used for drivingthe blue pixel units. In this way, the heating phenomenon of the drivingtransistors in a part of pixel units when the pixel units of differentcolors are driven by the driving voltage of the same magnitude in theprior art can be avoided.

In the present embodiment, optionally, the power supply module 20 may beintegrated with the driving power supply 21 in the same module, and thepower supply module 20 is used for providing an initial voltage VCC tothe driving power supply 21.

In the present embodiment, structures and working principles of thetiming controller 22, the power supply module 20, the scanning circuit23 and the data driving circuit 24 are the same as those in the priorart, and are not described repeatedly herein.

Embodiment 5 of the present invention provides an organic light emittingdiode display including the above-described display driving circuit,which can effectively reduce gate-source voltage of the drivingtransistor in the pixel unit when it is operating, thereby avoidingheating in the driving transistor, reducing power consumption of thedriving transistor at the same time, and further lowering powerconsumption of the organic light emitting diode display as a whole.

It should be noted that, the pixel units in the above embodimentsinclude: red pixel units, green pixel units and blue pixel units, andthe technical solution, in which the number of the driving voltageoutput terminals of the driving power supply is three, is merelyexemplary, and is not meant to limit the technical solutions of thepresent application.

It can be understood that, the above implementations are merelyexemplary implementations used for explaining the principle of thepresent invention, but the present invention is not limited thereto. Forthose skilled in the art, various modifications and improvements may bemade without departing from the spirit and essence of the presentinvention, and these modifications and improvements are also deemed asfalling within the protection scope of the present invention.

1. A driving power supply, comprising a boost module and a voltageadjusting module connected to the boost module, wherein, the boostmodule is used for boosting an initial voltage input from an initialvoltage input terminal of the driving power supply to generate areference voltage and for outputting the reference voltage to thevoltage adjusting module; and the voltage adjusting module is used foradjusting magnitude of the reference voltage according to colors ofpixel units to be driven to generate a plurality of driving voltages,respectively, wherein, the driving voltages corresponding to pixel unitsof different colors are different.
 2. The driving power supply accordingto claim 1, further comprising a plurality of driving voltage outputterminals for outputting the plurality of driving voltages, wherein thedriving voltage output terminals are connected to the voltage adjustingmodule, each driving voltage output terminal is used for driving thepixel units of one color, and different driving voltage output terminalsoutput different driving voltages.
 3. The driving power supply accordingto claim 2, wherein, the voltage adjusting module comprises: a pulsecontrol module, second switching tubes and second filter capacitors, thenumber of the second switching tubes and the number of the second filtercapacitors are equal to that of the driving voltage output terminals,the second switching tubes are in one-to-one correspondence with thedriving voltage output terminals, and the second filter capacitors arein one-to-one correspondence with the driving voltage output terminals;gates of the second switching tubes are connected to the pulse controlmodule, first electrodes of the second switching tubes are connected tothe boost module, second electrodes of the second switching tubes areconnected to the corresponding driving voltage output terminals andfirst terminals of the second filter capacitors; second terminals of thesecond filter capacitors are grounded; and the pulse control module isused for generating pulse control signals and sending the pulse controlsignals to the second switching tubes, respectively, and duty ratio ofeach pulse control signal equals to a ratio between the driving voltageoutput from the driving voltage output terminal connected to the secondswitching tube which receives said pulse control signal and thereference voltage.
 4. The driving power supply according to claim 3,wherein, the pulse control module comprises: a pulse-adjusting controlsub-module, a pulse generator, a pulse width modulation circuit and alevel conversion circuit, and the pulse width modulation circuit isconnected to all of the pulse-adjusting control sub-module, the pulsegenerator and the level conversion circuit; the pulse-adjusting controlsub-module is used for generating a plurality of pulse-adjusting controlsignals according to the reference voltage and the driving voltages tobe generated by the voltage adjusting module; the pulse generator isused for generating an initial pulse signal with a preset frequency; thepulse width modulation circuit is used for performing pulse widthmodulation on the initial pulse signal according to the respectivepulse-adjusting control signals, so as to generate a plurality ofinitial pulse control signals; and the level conversion circuit is usedfor performing level conversion on the initial pulse control signals soas to generate a plurality of pulse control signals, which are used forcontrolling on/off states of the second switching tubes, respectively.5. The driving power supply according to claim 4, wherein, thepulse-adjusting control sub-module comprises: a storage device and adecoding circuit connected to both the storage device and the pulsewidth modulation circuit; the storage device stores data information ofthe reference voltage and data information of the driving voltages to begenerated by the voltage adjusting module; and the decoding circuit isused for performing a decoding process on the data information of thereference voltage and the data information of the driving voltages to begenerated by the voltage adjusting module, so as to obtain voltagevalues of the reference voltage and the driving voltages to be generatedby the voltage adjusting module, and the decoding circuit is furtherused for generating pulse-adjusting control signals according to ratiosbetween the voltage values of the driving voltages to be generated bythe voltage adjusting module and the voltage value of the referencevoltage.
 6. The driving power supply according to claim 5, wherein, thestorage device is a read-only memory, which pre-stores data informationof the driving voltages corresponding to the pixel units of differentcolors and the data information of the reference voltage.
 7. The drivingpower supply according to claim 5, wherein, the storage device is aregister, and the pulse-adjusting control sub-module further comprises:a signal receiver, which is connected to the decoding circuit; thesignal receiver is used for receiving a timing control signal sent by atiming controller outside the driving power supply, and the timingcontrol signal includes the data information of the reference voltageand the data information of the driving voltages to be generated by thevoltage adjusting module; and the decoding circuit is further used fordecoding the timing control signal to obtain the data information of thereference voltage and the data information of the driving voltages to begenerated by the voltage adjusting module therein, and storing thedecoded data information of the reference voltage and the decoded datainformation of the driving voltages to be generated by the voltageadjusting module into the register.
 8. The driving power supplyaccording to claim 4, wherein, the pulse-adjusting control sub-modulecomprises: a first level signal input terminal and groups of dividerresistors whose number is the same as that of the driving voltage outputterminals, and each group of divider resistors comprises: a thirdresistor and a fourth resistor connected in series; the first levelsignal input terminal is connected to first terminals of the thirdresistors, second terminals of the fourth resistors are grounded, secondterminals of the third resistors and first terminals of the fourthresistors are connected to the pulse width modulation circuit; the firstlevel signal input terminal is used for generating a first initial levelsignal and outputting the first initial level signal to the groups ofdivider resistors; the groups of divider resistors each are used forperforming voltage dividing process on the first initial level signal togenerate the pulse-adjusting control signals; and ratios betweenresistance values of the third resistors and resistance values of thefourth resistors in different groups of divider resistors are different.9. The driving power supply according to claim 4, wherein, thepulse-adjusting control sub-module comprises: a second level signalinput terminal and fifth resistors whose number is the same as that ofthe driving voltage output terminals, the second level signal inputterminal is connected to first terminals of the fifth resistors, andsecond terminals of the fifth resistors are connected to the pulse widthmodulation circuit; the second level signal input terminal is used forgenerating a second initial level signal and outputting the secondinitial level signal to the fifth resistors; the fifth resistors eachare used for performing voltage reduction on the second initial levelsignal to generate the pulse-adjusting control signals; and resistancevalues of the fifth resistors are different from each other.
 10. Thedriving power supply according to claim 3, wherein, the pixel unitsinclude: red pixel units, green pixel units and blue pixel units, andthe number of the driving voltage output terminals is three.
 11. Thedriving power supply according to claim 10, wherein, the pulse controlsignals include: red pulse control signal, green pulse control signaland blue pulse control signal; phase differences between a rising edgeof any one of the red pulse control signal, the green pulse controlsignal and the blue pulse control signal and rising edges of the othertwo pulse control signals are both 120 degrees; or, phase differencesbetween a falling edge of any one of the red pulse control signal, thegreen pulse control signal and the blue pulse control signal and fallingedges of the other two pulse control signals are both 120 degrees. 12.The driving power supply according to claim 3, wherein, the pulsecontrol module is a single chip microcomputer.
 13. The driving powersupply according to claim 2, wherein, the voltage adjusting modulecomprises: linear voltage regulators and third filter capacitors, thenumber of the linear voltage regulators and the number of the thirdfilter capacitors are the same as that of the driving voltage outputterminals, the linear voltage regulators are in one-to-onecorrespondence with the driving voltage output terminals, and the thirdfilter capacitors are in one-to-one correspondence with the drivingvoltage output terminals; input terminals of the linear voltageregulators are connected to the boost module, and output terminals ofthe linear voltage regulators are connected to the driving voltageoutput terminals and first terminals of the third filter capacitors;second terminals of the third filter capacitors are grounded; the linearregulators each are used for performing voltage reduction on thereference voltage to generate the driving voltages; and different linearvoltage regulators have different voltage reduction extents. 14-15.(canceled)
 16. A display driving circuit, comprising: the driving powersupply according to claim
 1. 17. The display driving circuit accordingto claim 16, wherein, the driving power supply comprises a plurality ofdriving voltage output terminals for outputting the plurality of drivingvoltages, wherein the driving voltage output terminals are connected tothe voltage adjusting module, each driving voltage output terminal isused for driving the pixel units of one color, and different drivingvoltage output terminals output different driving voltages.
 18. Thedisplay driving circuit according to claim 17, wherein, the voltageadjusting module comprises: a pulse control module, second switchingtubes and second filter capacitors, the number of the second switchingtubes and the number of the second filter capacitors are equal to thatof the driving voltage output terminals, the second switching tubes arein one-to-one correspondence with the driving voltage output terminals,and the second filter capacitors are in one-to-one correspondence withthe driving voltage output terminals; gates of the second switchingtubes are connected to the pulse control module, first electrodes of thesecond switching tubes are connected to the boost module, secondelectrodes of the second switching tubes are connected to thecorresponding driving voltage output terminals and first terminals ofthe second filter capacitors; second terminals of the second filtercapacitors are grounded; and the pulse control module is used forgenerating pulse control signals and sending the pulse control signalsto the second switching tubes, respectively, and duty ratio of eachpulse control signal equals to a ratio between the driving voltageoutput from the driving voltage output terminal connected to the secondswitching tube which receives said pulse control signal and thereference voltage.
 19. The display driving circuit according to claim18, wherein, the pulse control module comprises: a pulse-adjustingcontrol sub-module, a pulse generator, a pulse width modulation circuitand a level conversion circuit, and the pulse width modulation circuitis connected to all of the pulse-adjusting control sub-module, the pulsegenerator and the level conversion circuit; the pulse-adjusting controlsub-module is used for generating a plurality of pulse-adjusting controlsignals according to the reference voltage and the driving voltages tobe generated by the voltage adjusting module; the pulse generator isused for generating an initial pulse signal with a preset frequency; thepulse width modulation circuit is used for performing pulse widthmodulation on the initial pulse signal according to the respectivepulse-adjusting control signals, so as to generate a plurality ofinitial pulse control signals; and the level conversion circuit is usedfor performing level conversion on the initial pulse control signals soas to generate a plurality of pulse control signals, which are used forcontrolling on/off states of the second switching tubes, respectively.20. The display driving circuit according to claim 19, wherein, thepulse-adjusting control sub-module comprises: a storage device and adecoding circuit connected to both the storage device and the pulsewidth modulation circuit; the storage device stores data information ofthe reference voltage and data information of the driving voltages to begenerated by the voltage adjusting module; and the decoding circuit isused for performing a decoding process on the data information of thereference voltage and the data information of the driving voltages to begenerated by the voltage adjusting module, so as to obtain voltagevalues of the reference voltage and the driving voltages to be generatedby the voltage adjusting module, and the decoding circuit is furtherused for generating pulse-adjusting control signals according to ratiosbetween the voltage values of the driving voltages to be generated bythe voltage adjusting module and the voltage value of the referencevoltage.
 21. The display driving circuit according to claim 17, wherein,the voltage adjusting module comprises: linear voltage regulators andthird filter capacitors, the number of the linear voltage regulators andthe number of the third filter capacitors are the same as that of thedriving voltage output terminals, the linear voltage regulators are inone-to-one correspondence with the driving voltage output terminals, andthe third filter capacitors are in one-to-one correspondence with thedriving voltage output terminals; input terminals of the linear voltageregulators are connected to the boost module, and output terminals ofthe linear voltage regulators are connected to the driving voltageoutput terminals and first terminals of the third filter capacitors;second terminals of the third filter capacitors are grounded; the linearregulators each are used for performing voltage reduction on thereference voltage to generate the driving voltages; and different linearvoltage regulators have different voltage reduction extents.
 22. Anorganic light emitting diode display, comprising: the display drivingcircuit according to claim 16.